Gayatri Mehta is an Associate Professor in the department of Electrical Engineering at the University of North Texas. She received her Ph. D in Electrical and Computer Engineering from the University of Pittsburgh in 2009. Her research interests are broadly in the areas of electronic design automation, reconfigurable computing, low-power VLSI design, system-on-a chip design, embedded systems, and portable/wearable computing.
Dr. Mehta is the director of the Reconfigurable Computing Lab at UNT. She has received the 2017 UNT College of Engineering Faculty Research Award. She has designed an interactive mapping game UNTANGLED to uncover human mapping strategies. UNTANGLED received the People's Choice Award in the Games & Apps category of the 2012 International Science & Engineering Visualization Challenge conducted by Science and National Science Foundation.
- Reconfigurable Computing
- Low Power VLSI Design
- System on a chip(SoC) Design
- Embedded Computing
- Portable / Wearable Computing
- Visual Architectures: Engaging crowds in design and discovery for custom reconfigurable devices, National Science Foundation, 06/15/2-16 - 05/31/2019.
- Harnessing human intelligence for mapping on custom reconfigurable architectures, National Science Foundation, 07/01/2012 - 06/30/2017.
- Discovering new mapping strategies and architectures for coarse-grained reconfigurable devices through crowdsourcing and data-driven techniques, National Science Foundation, 08/01/2011 - 07/31/2013.
- A customized embedded platform for mobile health, UNT Research Opportunity Grant, 2013.
- Energy-efficient system-on-chip designs for portable/wearable devices, UNT Research Initiation Grant, 2011.
- An automated design space exploration for wearable computing, UNT Research Initiation Grant, 2010.
- Energy-Aware next Generation Light-weight reconfigurablE (EAGLE) devices for mission critical space applications, UNT Junior Faculty Summer Research Fellowship, 2010.
- G. Mehta and A. K. Jones, “An Energy-Efficient Coarse Grained Reconfigurable Fabric for Embedded Computing,” Computer Science Research and Technology, Volume 3, Nova Publishers 2011.
- R. D. B. Joseph, T. Malla, T. Miles, J. Tunks, and G. Mehta, "Spatial intelligence as related to success on regular and constrained electronic puzzle formats,” Global Journal of Computer Science and Technology: A Hardware and Computation, vol. 17, issue 1, 2017.
- G. Mehta, J. Tunks, K. Sanagapaty, A. Pal, and R. D. B. Joseph, “Constructing Knowledge in an Interactive Game-like Design Environment for STEM Education,” International Journal of Information and Communication Technology Education, vol. 7, no. 8, August 2017.
- G. Mehta, B. Kellerstedt, J. Tunks, K. Sanagapaty, A. Pal, and R. D. B. Joseph, “A Study of Self-Regulated Learning in an Online Gaming Environment for Engineering Education,” International Journal of Information and Education Technology, vol. 7, no. 6, June 2017.
- G. Mehta, K. Patel, and N. S. Pollard, “On Fast Iterative Mapping Algorithms for Stripe-based Reconfigurable Architectures,” Special Issue on Reconfigurable and Adaptive Computing, International Journal of Electronics, vol. 102, issue 1, 2015.
- A. Sistla, K. Patel, and G. Mehta, “Crowdsourcing for Mapping in Design Space Exploration of Custom Reconfigurable Architecture Designs,” Human Computation Journal, vol. 2, no. 1, 2015.
- G. Mehta, X. Luo, A. Sistla, A. Marin, M. Malladi, K. Patel, and B. Rodgers, “On Multiplayer Techniques for Crowdsourcing Mapping onto Custom Domain-Specific Architectures,” International Journal of Computer and Information Technology, vol. 3, issue 6, November 2014.
- G. Mehta, K. Patel and N. S. Pollard, “On Fast Iterative Mapping Algorithms for Stripe-based Reconfigurable Architectures,” Special Issue on Reconfigurable and Adaptive Computing, International Journal of Electronics, vol. 102, issue 1, 3-17, 2015.
- G. Mehta, K. Patel, N, Parde, and N. S. Pollard, “Data-driven Mapping using Local Patterns”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 32, issue 11, 2013.
- G. Mehta, C. Crawford, X. Luo, N. Parde, K. Patel, B. Rodgers, A. K. Sistla, A. Yadav and M. Reisner, “UNTANGLED - A game environment for discovery of creative mapping strategies”, ACM Transactions on Reconfigurable Technology and Systems, vol. 6, no. 3, 2013.
- G. Mehta, and A. K. Jones. "Implementation and validation of architectural space exploration techniques for domain-specific reconfigurable computing," Design Automation for Embedded Systems, Sept. 2013.
- H. S. Kim, V. Varanasi, G. Mehta, H. Zhang, T. Y Choi, K. Namuduri, J. Vingren, N. D’Souza, and R. Kowal, “Circuits, Systems, and Technologies for Detecting the Onset of Sudden Cardiac Death Through EKG Analysis,” IEEE Circuits and Systems magazine, vol. 13, no. 4, 2013.
- A. Yadav, J. Stander, A. K. Jones, G. Mehta, “A study of energy-area tradeoffs of various architectural styles for routing inputs in a domain-specific reconfigurable fabric,” International Journal of VLSI Design and Communication Systems, February 2013.
- G. Mehta, J. Stander, M. Baz, B. Hunsaker, and A. K. Jones, “Interconnect Customization for a Hardware Fabric,'' ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 14, No. 1, January 2009.
- A. K. Jones, R. Hoare, D. Kusic, J. Fazekas, G. Mehta, and J. Foster, “A VLIW Processor with Hardware Functions: Increasing Performance While Reducing Power,” IEEE Transactions on Circuits and Systems II, Vol. 53, No. 11, November 2006.
- G. Mehta, R. R. Hoare, J. Stander, J. Lucas, B. Hunsaker and A. K. Jones, “A Low- Energy Reconfigurable Fabric for the SuperCISC Architecture,'' Journal of Low Power Electronics, Vol. 2, No. 2, August 2006.
- A. K. Jones, R. Hoare, D. Kusic, G. Mehta, J. Fazekas, and J. Foster, “Reducing Power while Increasing Performance with SuperCISC,” ACM Transactions on Embedded Computing Systems (TECS), Vol. 5, No. 3, August 2006.
- K. Namuduri and G. Mehta, "Characterizing rate distortion region for video coding from first principles," Information Sciences and Systems (CISS), 2015 49th Annual Conference on, IEEE, March 2015.
- A. Sistla, X. Luo, M. Malladi, M. Reisner, R. Ganduri, and G. Mehta, "SmartBricks: A visual environment to design and explore novel custom domain-specific architectures," Parallel & Distributed Processing, 2014, IEEE International Symposium on, IEEE, 2014.
- G. Mehta, X. Luo, N. Parde, K. Patel, B. Rodgers, A. Sistla, “UNTANGLED – An Interactive Mapping Game for Engineering Education,” IEEE International Conference on Microelectronic Systems Education, 2013.
- A. Sistla, N. Parde, K. Patel, G. Mehta, “Cross-architectural study of custom reconfigurable devices using crowdsourcing,” Parallel & Distributed Processing, 2013, IEEE International Symposium on, IEEE, 2013.
- G. Mehta, S. Cook, C. Crawford, A. Odunsi, K. Patel, B. Rogers, and A. Yadav, “Game-driven discovery of new mapping strategies for custom domain-specific architectures,” WIP, IEEE/ACM Design Automation Conference (DAC), 2012.
- T. Hatch, J. Styrvoky, J. Garcia, H. Zhang, G. Mehta, S. Boetcher, “Small-scale power generation and storage using piezoelectric films,” Proceedings of the ASME International Mechanical Engineering Congress and Exposition, 2011.
- G. Mehta and A. K. Jones, “An Architectural Space Exploration Tool for Domain Specific Reconfigurable Computing,” Parallel & Distributed Processing, 2010, IEEE International Symposium on, IEEE, 2010.
- M. Gomathisankaran, G. Mehta, and K. Namuduri, “Power, Performance and Security Optimized Hardware Design for H.264,” Proceedings of the Sixth Annual Workshop on Cyber Security and Information Intelligence Research, ACM, 2010.
- Mehta, Gayatri, Colin J. Ihrig, and Alex K. Jones. "Reducing energy by exploring heterogeneity in a coarse-grain fabric." Parallel and Distributed Processing, 2008. IPDPS 2008. IEEE International Symposium on. IEEE, 2008.
- G. Mehta, J. Stander, M. Baz, B. Hunsaker and A. K. Jones, “Interconnect Customization for a Coarse-grained Reconfigurable Fabric,” Parallel and Distributed Processing Symposium, 2007. IPDPS 2007. IEEE International. IEEE, 2007.
- G. Mehta, R. Hoare, J. Stander, and A. K. Jones, “A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture,” Field-Programmable Custom Computing Machines, 2006. FCCM'06. 14th Annual IEEE Symposium on. IEEE, 2006.
- G. Mehta, R. Hoare, J. Stander, and A. K. Jones, “Design Space Exploration for Low-Power Reconfigurable Fabrics,” Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International, IEEE, 2006.
- R. Hoare, A.K. Jones, D. Kusic, J.Fazekas, G. Mehta and J. Foster, “A VLIW Processor with Hardware Functions: Increasing Performance While Reducing Power,” Proc. of the Workshop on High Performance Embedded Computing (HPEC), 2005.
- Data-driven Mapping using Local Patterns, UNT-EE-TR-01
- UNTANGLED: A Game Environment for Discovery of Creative Mapping Strategies, UNT-EE-TR-02
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